Drag, drop, and stitch scan flops into chains. Generate STIL patterns. Watch fault coverage climb. All in a tab — no toolchain, no license server, no IT ticket.
ScanForge is opinionated about the things students and small teams actually need: chain assembly, balance checks, coverage estimation, and standards-compliant exports.
Drag flops onto a canvas, connect them with typed edges, and watch your chain grow. The builder shows hold-time and balance warnings as you stitch.
A fault simulator runs in the background of every change. Stuck-at, transition, and path-delay coverage update in real time, so you can see why the number moves.
Generate STIL 1450 patterns and BSDL descriptions in one click. Files are clean, standards-compliant, and importable into commercial ATPG tools for verification.
ScanForge models per-flop delay across the chain and warns about skew, hold violations, and unbalanced lengths — the things that bite you at tape-out.
Export per-flop and per-block coverage reports. Useful for project write-ups and lab reports; useful for the people who sign off on your design.
Designs save as plain JSON. You can read them, diff them in Git, and pipe them through any other tool you want. Nothing proprietary, no lock-in.
Upload a synthesized Verilog netlist, paste an RTL snippet, or start from one of our reference designs. ScanForge auto-detects flops and IO ports.
Use the auto-stitch to get a baseline, then refine by hand. The builder shows you the coverage, balance, and hold status as you go.
Generate STIL patterns and BSDL. Round-trip them into your commercial ATPG tool to verify the build. Submit your report, not your laptop.
No per-seat license, no floating token server, no "we'll get back to you on pricing."
It runs an in-browser fault simulator for the chain topology, with a stuck-at, transition, and path-delay model. The pattern generation is real, not a preview. For tape-out grade work, you should still verify with a commercial ATPG tool — we recommend round-tripping the STIL output.
On the free Student plan, you can build chains up to 1,000 flops. Pro and Team plans support designs up to 100,000 flops. Larger designs work but performance starts to vary by browser and machine.
Yes — ScanForge exports standards-compliant STIL 1450 and BSDL. Customers have round-tripped with the most common commercial ATPG and BSDL-aware test tools. If a tool gives you trouble, send us a sample and we'll tune the export.
Basic XOR-compression networks are supported on the Pro plan and above. Commercial-style EDT/streaming scan networks are not in scope; we treat them as a separate problem with their own toolchains.
Through our education partner — a one-time check using your school email or enrollment document. The free plan renews automatically as long as you're a student.
Everything runs in your browser by default. Designs save to your local machine or to a private workspace you control. We never see your netlist unless you explicitly share it.
Free for students. Free to try for everyone else. The chain will be ready before your coffee gets cold.